Over the weekend, and in advance of the 2018 ACM/IEEE Supercomputing Conference, Intel has unveiled the "Cascade Lake Advanced Performance" revision of Xeon processors targeted toward data center usage. The new CPUs are intended to be high-performance complements to the Cascade Lake-SP server processors, and a direct competitor to AMD's Epyc series of CPUs, which have threatened Intel's near-monopoly on the server CPU market.
The Cascade Lake-AP CPUs are still built on Intel's 14nm manufacturing process, as the company's plans for 10nm CPUs have faced multiple delays. (To date, the only 10nm CPU from Intel is the Cannon Lake Core i3-8121U, a 15W part found in budget notebooks.) The high-end model will feature 48 cores, which is achieved by using a multi-chip package. Intel confirmed to Anandtech that the two silicon dies are connected by UPI (Ultra Path Interconnect) which allows for 10.4 GT/s per link (the number of links is unconfirmed), rather than Intel's own highly touted EMIB (Embedded Multi-Die Interconnect Bridge), which would perform better.
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In effect, this design is an attempt to cram the theoretical performance of a 4P server into a 2P server, though the engineering required to achieve this feat will inevitably require engineering compromises. While the power requirements and communication latency between two processor dies on the same package are likely lower than two processors on the same server, the task of connecting four discrete processor dies in two packages without degrading performance is a substantial undertaking.
While Intel has tipped the Cascade Lake-AP series as having 12 DDR4 channels — which they claim is the most of any available CPU — information about maximum memory capacity, frequencies, and usable variants remains unknown. Likewise, data about TDP per processor and available PCI lanes also went undisclosed. Intel is planning to make these processors available in early 2019, though likewise did not disclose pricing. Intel did note in the press release that Cascade Lake-AP performed up to 3.4 times faster in Linpack and 1.3 times faster in Stream Triad than AMD Epyc 7601, though AMD had last month publicly called out Intel for "questionable" configurations used in published benchmarks for the enthusiast desktop grade Core i9-9900K.
The most important advancement Cascade Lake-AP brings to high performance computing is support for Optane DIMMs, as this is the first series of processors from Intel to support the technology. Optane — also known as 3D XPoint — is faster than NAND-based SSDs, though slower than traditional DRAM. It is, however, substantially more dense than DRAM, allowing Intel to cram 512GB in a single module. Database applications stand to benefit the most from Optane DIMMs, as in-memory computing, or simply storing larger working sets in memory, would allow for substantially faster transaction speeds, as writes do not need to be immediately pushed through PCIe-linked solid-state storage, eliminating a significant bottleneck.
As Optane DIMMs retain the nonvolatile properties inherent to solid state drives, it also increases performance on reboots. Intel noted in May, in an announcement about availability of Optane DIMMs, that "for planned restarts of a NoSQL in-memory database using Aerospike Hybrid Memory Architecture, Intel Optane DC persistent memory provides a minutes-to-seconds restart speedup compared to DRAM-only cold restart."
The big takeaways for tech leaders:
- Intel's Cascade Lake-AP series of server CPUs are designed to fit the performance of a 4P server in a 2P configuration.
- This is the first CPU which supports Intel's Optane DIMMs, which are high-density NVRAM sticks beneficial for in-memory computing tasks, particularly databases.
- Special report: The future of Everything as a Service (free PDF) (TechRepublic)
- Intel's turbo-charged Optane SSDs just got more affordable with the new 800P (ZDNet)
- All-flash arrays: The smart person's guide (TechRepublic)
- A Guide to Data Center Automation (ZDNet)
- How Intel Optane DC Persistent Memory could up capacity, lower cost of in-memory databases (TechRepublic)
James Sanders is a Writer for TechRepublic. Since 2013, he has been a regular contributor to TechRepublic and Tech Pro Research.