Intel has figured out how to increase performance and battery life at the same time. And Moore's Law keeps on truckin'.
News flash: Intel's new 22nm 3-D Tri-Gate Transistor will perpetuate Moore's Law for years to come.
If Moore's Law isn't doing it for you (I'll try again later), how about this: What if your current smartphone responded like an uber-fast PC, and the battery wasn't drained after a four-hour Skype call?
Apply those improvements to anything that has a chip in it -- from mighty web servers to tiny pacemakers -- and you'll understand what Intel has done. A friend who specializes in hardware engineering likens it to a Formula One race car with the fuel mileage of a Toyota Prius.
I was skeptical. Typically, performance is improved or power consumption reduced, never both at the same time. So, how did Intel pull it off? Not one, but two innovations were shoehorned into the same project.
Intel shrank the fabrication process to use 22 nanometer (nm=billionths of a meter) nodes. Next, Intel departed from traditional planar (2-D) gates, using instead 3-D Tri-Gate technology. Let's look at the reduction in circuit size, first.To improve performance, semiconductor houses including Intel want to shrink the current 32nm fabrication process. Not that processors using the 32nm fabrication process are slouches. You may recognize the Intel processors in Figure A, all of which use 32nm nodes. Figure A
Image courtesy Intel
If that's true, why work so hard and spend so much money to shrink something only 10 nanometers? Moore's Law is why. I told you I'd get back to it. Gordon Moore, Ph.D. and co-founder of Intel made a bold prediction in 1965:
"The number of transistors incorporated in a chip will approximately double every 24 months."
"For more than four decades, Intel has delivered the challenge of Moore's Law. However, a fundamental barrier is emerging --technology is approaching atomic dimensions. Intel is already working on technologies to overcome this."
The clock is ticking. The current 32nm fabrication process is more than two years old.
In order to double the number of transistors, scientists need the fabrication process to use 22nm nodes, which means circuit paths not much thicker than single atoms. This must-see video by Mark Bohr, Intel fellow and lead on the new 22nm manufacturing process, provides perspective.
Well, they pulled it off. Intel got the 22nm fabrication process to work, getting the right number of transistors to fit in a useable form factor. Moore's Law is safe for another two years, when the fabrication process will use 14nm nodes. Tick, tock.Impressive as that is, it's time to discuss a new technology that is equally profound. Conventional transistors are planar devices, using a 2-D conducting channel as depicted in Figure B. Figure B
Image courtesy Intel
The same slide illustrates Intel's new approach where three surfaces form conducting channels, hence the term 3-D Tri-Gate. The photographs below provide a rather unique context, allowing us to see something only nanometers wide.Figure C
32nm planar gates (Image courtesy Intel Press Kit)Figure D
22nm 3-D Tri-Gates (Image courtesy Intel Press Kit)
So that's how they did it. Now, let's look at what it all means.
Intel has all sorts of graphs and statistics about the 22nm 3-D Tri-Gate transistors, perfect for my engineer friend, but not me. Knowing that, he summarized the new transistor:
- 40% increase in performance at low voltage when compared to 32nm 2-D transistors.
- Consumes half the power at the same performance level as 32nm 2-D transistors.
Intel expects to have the first microprocessor using 22nm 3-D Tri-Gate transistors (code-named Ivy Bridge) in production by late 2012. One can only imagine what the digital future will hold when technology surrounding something ubiquitous as a transistor leapfrogs.