International Journal of Engineering Sciences & Research Technology (IJESRT)

Latest Articles for International Journal of Engineering Sciences & Research Technology (IJESRT)

  • Implementation of Low-Power and Area-Efficient 64bit Carry Select Adder
    Hardware

    Implementation of Low-Power and Area-Efficient 64bit Carry Select Adder

    Now-a-days, hottest area of research in VLSI (Very Large Scale Integration) system is design of the area, high-speed and power-efficient data path logic systems. All processor consisting of Arithmetic and Logical Unit (ALU) and adder plays an important role for design of ALU. In digital adders, the speed of addition is limited by the time ...

  • A Literature Review on Phishing Email Detection using Data Mining
    Data Management

    A Literature Review on Phishing Email Detection using Data Mining

    Fraud emails have become common problem in recent years. Fraud emails are a real threat to internet communication. In this paper, hybrid features are used for detecting fraud emails to determine how fast they have classified fraud emails and normal emails. Instead of hybrid feature, only content as a feature can also be used but ...

  • XOR Classification
    Hardware

    XOR Classification

    In this paper, the authors introduces a new inequalities index, which was inspired from the simple perceptron’s pattern in the Artificial Neural Networks (ANNs) scientific field and nominated by the authors Modulus Perceptron Inequalities Index (MPII). Classification is an important issue in the field of computer science research. There are various methods for classification for ...

  • FPGA Implementation of a Compact AES Algorithm with S-Box Optimization
    Hardware

    FPGA Implementation of a Compact AES Algorithm with S-Box Optimization

    In this paper, the authors propose a compact AES (Advanced Encryption Standard) algorithm to achieve less slice consumption of FPGA. Proposed design is based on iterative round looping architecture. S-box is implemented using composite field arithmetic which requires less area than lookup table. They used same s-box for key expansion block. This design supports 128-bits ...

  • Comparison Between Serial Adder and Parallel Adder
    Hardware

    Comparison Between Serial Adder and Parallel Adder

    Basically in digital system there are two type of circuit: combinational logic circuit and sequential logic circuit. When the authors talk about combinational circuit, this circuit is that circuit of which output depends on input like half adder, full adder and in the sequential circuit output is depend on present state like flip flop etc. ...