An Ultra-WideBand (UWB) Low-Noise Amplifier (LNA) has been proposed in this paper. The effective bandwidth of noise canceling is extended. The 0.18um CMOS technology is used in the fabrication of this amplifier. The noise figure is calculated over 3.1-10.6GHz along with good gain and noise figure, good linearity is also required for the LNA to ...
In this paper, the authors deal with a hybrid converter topology Power Factor Correction (PFC) for DC drives which is fed through a diode bridge rectifier from a single phase AC mains. In this paper, both buck and boost converter topologies are combined together and operated alternatively according to the rectified DC input voltage level. ...
The portability in the electronic circuits is achieved by the use of battery. So its make designs for low power consumption. Normally non-volatile memories of Spin Transfer Torque Magneto resistive RAM (STTMRAM) is mainly used to designing process. Because STTMRAM have more advantages i.e. low power, infinite endurance and high speed. But STTMRAM have main ...
Peak-to-Average Power Ratio (PAPR) is an important parameter for the analysis of Orthogonal Frequency Division Multiplexing (OFDM) signals. CCDF curves are known to have great importance in the study of signal performance on the basis of power level. This paper presents the CCDF performance of the OFDM signal with different number of carriers. Simulation is ...
In this paper, the authors present a single phase five level PhotoVoltaic (PV) inverter topology for grid connected PV systems with a novel Pulse Width Modulated (PWM) control scheme. Two reference signals identical to each other with an offset equivalent to the amplitude of the triangular carrier signal were used to generate PWM signals for ...
Behavioral modeling and simulation of a PLL based integer n frequency synthesizer has been illustrated in this paper. The synthesizer generates a signal of 5.15-5.25GHz in the UNII (Unlicensed National Information Infrastructure) lower band which is used by IEEE 802.11(a). All the PLL building blocks are modeled and simulated using Simulink. The PLL performance has ...