Hardware
HardwareConvex Optimization of Resource Allocation in Asymmetric and Heterogeneous SoC
Chip area, power consumption, execution time, off-chip memory bandwidth, overall cache miss rate and Network-on-Chip (NoC) capacity are limiting the scalability of SoCs. Consider a workload comprising a sequential and multiple concurrent tasks and asymmetric or heterogeneous SoC architecture. A convex optimization framework is proposed, for selecting the optimal set of processing cores and allocating ...