Provided by: Institute of Electrical & Electronic Engineers
Date Added: Jun 2011
In this paper, the authors present a baseline residual encoder for H.264/AVC on a programmable fine-grained many-core processing array that utilizes no application-specific hardware. The software encoder contains integer transform, quantization, and Context-based Adaptive Variable Length Coding (CAVLC) functions. By exploiting fine-grained data and task-level parallelism, the residual encoder is partitioned and mapped to an array of 25 small processors. The proposed encoder encodes video sequences with variable frame sizes and can encode 1080p HDTV at 30 frames per second with 293 mW average power consumption by adjusting each processor to workload-based optimal clock frequencies and dual supply voltages - a 38.4% power reduction compared to operation with only one clock frequency and supply voltage.