A Compact and Fast FPGA Based Implementation of Encoding and Decoding Algorithm Using Reed Solomon Codes

Provided by: International Association of Computer Science & Information Technology (IACSIT)
Topic: Hardware
Format: PDF
In this paper the authors present a compact and fast Field Programmable Gate Array (FPGA) based implementation technique of encoding and decoding algorithm using Reed Solomon (RS) codes, widely used in numerous applications ranging from wireless and mobile communications units to satellite links for correcting multiple errors especially burst-type errors. This paper is to provide the reader with a deep understanding of the theory of RS code and encoding and decoding of the codes to achieve efficient detection and correction of the errors.

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