Provided by: California Institute of Technology
Date Added: Sep 2013
Power dissipation is currently one of the most important design constraints in digital systems. In order to reduce power and energy demands in the foremost technology, CMOS, it is necessary to reduce the supply voltage to near the device threshold voltage. Existing analytical models for MOS devices are either too complex, thus obscuring the basic physical relations between voltages and currents; or they are inaccurate and discontinuous around the region of interest, near-threshold. This paper presents a simple transregional compact model for analyzing digital circuits around the threshold voltage, i.e., near threshold.