International Journal of Recent Technology and Engineering (IJRTE)
There is three type of low power technique discussed here for static random access memory. One is quiet bit line architecture in which the voltage of bit line stay as low as possible. To prevent the excessive full-swing charging on the bitline one-side driving scheme for write operation is used and for read pre-charge free-pulling scheme is used to keep all bit lines at low voltages at all times. Second is Body bias technique which decreases the process variation on the SRAM cell and it can operate at 0.3 and write margin is not degraded.