A Computation- And Communication- Infrastructure for Modular Special Instructions in a Dynamically Reconfigurable Processor

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Processors with a reconfigurable instruction set combine the performance of dedicated application accelerators with a flexibility that goes beyond that of traditional Application Specific Instruction set Processors (ASIPs). The latter are optimized for certain application domains and thus typically do not provide a high performance and/or efficiency when deployed in other domains. State-of-the-art Reconfigurable Processors on the other side still use the concept of monolithic Special Instructions (SIs). In this paper, the authors instead present modular SIs as a hierarchy of elementary data paths and different SI implementations that facilitate a high flexibility and performance.
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