A Constraint Logic Programming Framework for the Synthesis of Fault-Tolerant Schedules for Distributed Embedded Systems

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Provided by: Technical University of Crete
Topic: Hardware
Format: PDF
The authors present a Constraint Logic Programming (CLP) approach for synthesis of fault-tolerant hard real-time applications on distributed heterogeneous architectures. They address time-triggered systems, where processes and messages are statically scheduled based on schedule tables. They use process re-execution for recovering from multiple transient faults. They propose three scheduling approaches, which each present a trade-off between schedule simplicity and performance, full transparency, slack sharing and conditional, and provide various degrees of transparency. They have developed a CLP framework that produces the fault-tolerant schedules, guaranteeing schedulability in the presence of transient faults.
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