A Cost-Effective Design of Reversible Programmable Logic Array
In the recent era, reversible computing is a growing field having applications in nano-technology, optical information processing, quantum networks, etc. In this paper, the authors show the design of a cost effective reversible programmable logic array using VHDL. It is simulated on Xilinx ISE 8.2i and results are shown. The proposed reversible programming logic array called RPLA is designed by MUX gate and Feynman gate for 3-inputs, which is able to perform any reversible 3-input logic function or Boolean function. Furthermore, the quantized analysis with comparative finding is shown for the realized RPLA against the existing one.