A Decoupled Architecture of Processors with Scratch-Pad Memory Hierarchy

Provided by: edaa
Topic: Hardware
Format: PDF
The authors present a decoupled architecture of processors with a memory hierarchy of only scratch - pad memories, and a main memory. The decoupled architecture also exploits the parallelism between address computation and processing the application data. The application code is split in two programs the first for computing the addresses of the data in the memory hierarchy and the second for processing the application data. The first program is executed by one of the decoupled processors called Access which uses compiler methods for placing data in the memory hierarchy.

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