A Design Space Exploration Methodology Supporting Run-Time Resource Management for Multi-Processor Systems-on-Chip

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Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
Application specific multi-processor Systems-on-Chips (MPSoCs) are currently designed by using platform-based synthesis techniques. In this approach, a wide range of platform parameters are tuned either at design-time or at run-time, to provide the best trade-offs in terms of the selected system figures of merit (such as power and throughput) for a dynamic application-specific workload. Among the design-time (hardware) configurable parameters, the authors can find the memory sub-system configuration (e.g. cache size and associativity) and other architectural parameters such as the instruction-level parallelism of the system processors.
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