A Fast - Locking Pulsewidth Controlled Clock Generator for High Speed SOC Applications

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Provided by: International Journal of Innovative Research in Science, Engineering and Technology (IJIRSET)
Topic: Hardware
Format: PDF
A fast-locking Pulse Width-Controlled Clock Generator (PWCCG) based on delay locked loop is proposed in this paper. The coarse and fine delay lines and a time-to-digital detector permit the Pulse Width-Controlled Clock Generator (PWCCG) to operate over a wide frequency range. A new duty cycle setting circuit is also presented in this paper that decides the preferred output duty cycle. Result of the proposed circuit achieves suitable for an input operating frequency range at 2MHz and an input duty cycle ranging from 30% to 70%, and produce a programmable output duty cycle ranging from 30% to 66%.
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