European Design and Automation Association
Most Network-on-Chip (NoC) architectures are based on a mesh-based interconnection structure. In this paper, the authors present a new NoC architecture, which relies on source synchronous data transfer over a ring. The source synchronous ring data is clocked by a resonant clock, which operates significantly faster than individual processors that are served by the ring. This allows the user to significantly improve the cross section bandwidth and the latency of the NoC. They have validated the design using a 22nm predictive process.