A FPGA Implementation of Memory Efficient Distributed Arithmetic Fir Filter

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Provided by: International Journal of Computer Science & Engineering Technology (IJCSET)
Topic: Storage
Format: PDF
Finite Impulse Response (FIR) filters are the most popular type of filters implemented in software. An FIR filter is usually implemented by using a series of delays, multipliers, and adders to create the filter's output. To implement fir filter based on DA (Distributed Arithmetic) algorithm is directly applied in FPGA (Field Programmable Gate Array), it is difficult to achieve the best configuration in the coefficients of fir filter, memory and computational speed. This paper provides the Distributed Arithmetic can save considerable hardware resources through using LUT to take the place of MAC units.
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