Institute of Electrical & Electronic Engineers
Memory and communication architectures have a significant impact on the cost, performance, and time-to-market of complex Multi-Processor System-on-Chip (MPSoC) designs. The memory architecture dictates most of the data traffic flow in a design, which in turn influences the design of the communication architecture. Thus, there is a need to cosynthesize the memory and communication architectures to avoid making suboptimal design decisions. This is in contrast to traditional platform-based design approaches where memory and communication architectures are synthesized separately.