A Framework for Memory-Aware Multimedia Application Mapping on Chip-Multiprocessors

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
The relentless increase in multimedia embedded system application requirements as well as improvements in IC design technology has motivated the deployment of Chip Multi-Processor (CMP) architectures. Task scheduling and data placement in memory are two of the most important steps in the application customization process as they greatly influence overall power consumption, and performance. Most designers consider task scheduling and data placement to be independent of each other. However, optimal task scheduling does not always produce optimal data placement, and optimal data placement may not necessarily allow for optimal task scheduling.

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