A Framework for Rapid System-Level Exploration, Synthesis, and Programming of Multimedia MP-SoCs

Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
In this paper, the authors present the Daedalus framework, which allows for traversing the path from sequential application specification to a working MP-SoC prototype in FPGA technology with the (parallelized) application mapped onto it in only a matter of hours. During this traversal, which offers a high degree of automation, guidance is provided by Daedalus' integrated system-level design space exploration environment. They show that Daedalus offers remarkable potentials for quickly experimenting with different MP-SoC architectures and exploring system-level design options during the very early stages of design.

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