A Generic FPGA Emulation Framework

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Provided by: PUCRS
Topic: Hardware
Format: PDF
Verification techniques face growing challenges, as digital system design becomes increasingly complex. Currently, verification is believed to be the main bottleneck for expedite complex designs, consuming at least 70% of the whole system development effort. This paper proposes a new, generic hardware emulation framework to improve the observability of designs as well as reducing emulation-based verification intrusiveness. The proposed emulator provides enhanced observability and controllability of inner workings of the system when compared to commercial FPGA-based emulators and is less intrusive on the design under verification.
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