A High-Performance Hierarchical Ring On-Chip Interconnect with Low-Cost Routers

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Provided by: Carnegie Mellon University
Topic: Hardware
Format: PDF
Energy consumption of routers in commonly used mesh-based on-chip networks for chip multiprocessors is an increasingly important concern: these routers consist of a crossbar and complex control logic and can require significant buffers, hence high energy and area consumption. In contrast, an alternative design uses ring-based networks to connect network nodes with small and simple routers. Rings have been used in recent commercial designs, and are well-suited to smaller core counts. However, rings do not scale as efficiently as meshes.
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