International Journal of Engineering Innovations and Research (IJEIR)
Matrix multiplication is used in applications such as signal and image processing, graphics and robotics etc. In this paper, the authors design and discuss the results of implementing matrix-vector multiplication which is computationally very exhaustive. It requires several multiply and add units. Processing system take numerous clock cycles to perform all the necessary multiply add operations. The overall performance is restricted by the number of multiplications and additions that could be done in parallel. Matrix multiplication architecture is based on serial-parallel sign multiplier and adder component.