International Journal of Engineering and Innovative Technology (IJEIT)
A novel PWM single-chip controller IC with table look-up PID compensator for output voltage regulation is presented, which can achieve a minimum embedded memory requirement. The controller employs analog hysteresis voltage comparators, a 4-level Error Process Unit (4-level EPU), a memory-reused PID compensator and a low-power-consumption digital PWM. Based on the efficient memory-access mechanism, the controller can alleviate the penalty of large amount of embedded memory employed for table look-up based PID compensation. The proposed controller has been validated with test-chip measurement results which demonstrate feasibility of the proposed approach.