A Latency Simulator for Many-Core Systems

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Provided by: Alcatel-Lucent
Topic: Hardware
Format: PDF
In this paper, the authors present MCoreSim, an open-source simulation framework for massively parallel and many-core computing systems based on OMNeT++. The simulator supports tile-based architectures with distributed memory and mesh-based interconnects. Its primary purpose is to allow for investigations on the impact of the heterogeneous in-chip communication latencies, as arising due to the network-on-a-chip structure of future and emerging many-core processors, on the performance of the hosted applications. They plan to use MCoreSim to study the variety of possible choices in realizing a suitable software stack for these systems, especially in terms of the choices at the kernel design level.
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