International Association of Computer Science and Information Technology(IACSIT)
Low arithmetic complexity and High speed of Fast Fourier transforms (FFT)/Inverse FFT (IFFT) processor is required in many applications in Orthogonal Frequency Division Multiplexing (OFDM)-based wireless broadband communication systems. For this reason, it's essential to develop an optimum complexity design FFT/IFFT processor to meet the low power and real time requirements. This paper presents a multiplicative comparison between developed FFT/IFFTs design and efficient pipeline radix structures applied for OFDM modulator/demodulator to be used in IEEE 802.11a and IEEE 802.16a systems. The proposed paper reduces the multiplicative complexity by using feedback architecture and reduction approach of complex multiplications.