International Journal of Research and Applications (IJRA)
The design of an ultra-low voltage, low power high speed 8 channel Analog multiplexer in 180nm CMOS technology is presented. A modified transmission gate using a Dynamic Threshold voltage MOSFET (DTMOS) is employed in the design. Sub threshold source coupled logic gate circuits were designed and implemented for achieving low power. The design is optimized with respect to critical requirements like short switching time, low power dissipation, good linearity and high dynamic range with an operating voltage of 0.4V.