Provided by: International Journal of Engineering Research and Applications (IJERA)
Date Added: Feb 2014
Frequency synthesizer is one of the important elements for wireless communication application. The speed of VCO and prescaler determines how fast the frequency synthesizer is. A dual modulus prescaler contains logic gates and flip-flops. This paper aim for developing a low power single clock multiband network which will supply for the multi clock domain network. The multiband divider consists of a proposed wideband multi modulus 32/33/47/48 prescaler and an improved bit-cell for Swallow (S) counter and can divide the frequencies in the three bands of 2.4 - 2.484 GHz, 5.15 - 5.35 GHz, and 5.725 - 5.825 GHz with a resolution selectable from 1 to 25MHz.