A Mapping Framework for Guided Design Space Exploration of Heterogeneous MP-SoCs

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Provided by: edaa
Topic: Hardware
Format: PDF
When designing heterogeneous MP-SoCs designers have to take into account various objectives such as power, die size, flexibility, performance or programmability. But to be able to evaluate a given system according to these objectives, it is necessary to know how applications will behave on that system. Since time-to-market is one key factor in chip design, it is important to be able to evaluate these systems at a very early design stage. Today this is usually done with simulations in languages such as Simulink or SystemC.
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