A Method for Test Pattern Generation of Combinational Circuits Using Ordinary Algebra

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Provided by: International Journal of Computer and Information Technology (IJCIT)
Topic: Hardware
Format: PDF
In this paper, the authors introduce ordinary algebra to express the truth value of a logic function. The algebraic expressions are based on switching variables that take the values 0, 1, or unspecified. The expressions contain addition and subtraction operators from ordinary algebra. It is shown that these algebraic expressions can be used in conjunction with the Boolean difference equation to generate test patterns for a combinational logic circuit. The test pattern generation method is complete because it will find a test set for a fault or otherwise prove the fault to be untestable.
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