The International Journal of Innovative Research in Computer and Communication Engineering
The FFT architecture was reconfigurable for supporting both variable length and multi-streaming. They are able to process architecture in 1 stream of 2048-pt FFT or two streams of 1024-pt FFT or 4 stream of 512-pt FFT. The architecture having SDF (Super Dimension Fortress) pipelined stages and in each stage radix-2 butterfly is calculate. The sampling frequency is changed in depend upon the FFT length. The word length and buffer length in each stage is calculate by FFT length. Power consumption was decreases by use of latch gating.