A New Fast Access Low Power Multilevel Cache Architecture

Download Now
Provided by: The International Journal of Innovative Research in Computer and Communication Engineering
Topic: Software
Format: PDF
Cache write-through policy is more efficient and offers better performance in high performance microprocessors compared to write-back policy. Here, write is done synchronously to cache as well as the main memory. The drawback of write-through policy is the large energy overhead due to frequent lower lever cache accesses during write operations. A new cache architecture is proposed here in order to reduce the power consumption and increase the speed of data access. Here, a tag is attached to each way in the L2 cache. This way tag is stored in way-tag array in L1 cache.
Download Now

Find By Topic