A New Methodology for Asynchronous Systems

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Provided by: International Journal of Advanced Research in Electrical, Electronics and Instrumentation Engineering (IJAREEIE)
Topic: Hardware
Format: PDF
As design systems have grown in complexity and clock speeds are constantly increasing, several limitations to the conceptual framework of synchronous design have begun to be noticed. Some notable problems due to higher performance demand are clock skew, power dissipation, interfacing difficulties and worst case performance. It is therefore not a surprise that the area of asynchronous circuits and systems, which generally do not suffer from these problems, is experiencing a significant resurgence of interest and research activity.
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