International Journal of Engineering Research and Development (IJERD)
Reversible logic is gaining interest of many researchers due to its low power dissipating characteristic. In this paper, the authors proposed a new approach for designing online testable reversible circuits. The resultant testable reversible circuit can detect any single bit error whiles it is operating. Appropriate theorems and lemmas are presented to clarify the proposed design. The experimental results show that their design approach is superior in terms of number of number of gates, garbage outputs and quantum cost.