A Novel Approach for Implementation of AES Algorithm on NOC

Provided by: IRD India
Topic: Hardware
Format: PDF
Network-on-Chip (NoC) is the scalable platform where billion transistors have been integrated on to a single chip. NoC architecture is an mxn mesh of processing elements where resources are placed on the slots formed by the switches. Each switch is connected to one resource and four neighboring switches, and each resource is connected to one switch. A resource can be a processor core, memory, or any other Intellectual Property (IP) block, which fits into the available slot and complies with the interface of the NoC. The NoC architecture is an on-chip communication infrastructure which comply OSI protocol stack.

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