Communication security is very important in day-to-day life. The proposed algorithms and architectures operate on Galois Fields (GF) of the form GF (p) for integers and GF (2n) for polynomials. The paper presents a survey of most common hardware architectures for finite field arithmetic especially suitable for cryptographic applications. The hardware implementation of modular exponentiation for very large integers is a well-known topic in digital arithmetic. An effective approach for obtaining parallel and carry-free implementations consists in using the Montgomery exponentiation algorithm and executing the necessary operations in RNS (Residue Number System).