Academy & Industry Research Collaboration Center
Presenting a novel full adder cell will be increases all the arithmetic logic unit performance. In this paper, the authors present two new full adder cell designs using Carbon NanoTube Field Effect Transistors (CNTFETs). In the first design, they have 42 transistors and 5 pull-up resistance so that they have achieved an improvement in the output parameters. Simulations were carried out using HSPICE based on the CNTFET model with 0.9V VDD. The denouements results in that they have a considerable improvement in power, delay and power delay product than the previous papers.