A Novel High Performance 64-Bit MAC Unit with Modified Wallace Tree Multiplier
MAC unit is a common step in many Digital Signal Processing (DSP) applications involving multiplications and/or accumulations. A novel high performance design of 64 bit Multiplier-and-ACcumulator (MAC) unit is implemented in this paper, by using modified Wallace tree multiplier and carry save adder. MAC unit performs many important arithmetic and other operations in many of the Digital Signal Processing (DSP) applications. This 64-bit MAC Unit is suitable to use in 64-bit DSP processors. The paper is coded in Verilog-HDL. The power dissipation of entire MAC unit is 182.312mW.