A Parallel Hardware Architecture for Scale and Rotation Invariant Feature Detection

Provided by: Institute of Electrical & Electronic Engineers
Topic: Hardware
Format: PDF
In this paper, the authors propose a parallel hardware architecture for image feature detection based on the SIFT (Scale Invariant Feature Transform) algorithm and applied to the SLAM (Simultaneous Localization And Mapping) problem. The paper also proposes specific hardware optimizations considered fundamental to embed such a robotic control system on-a-chip. The proposed architecture is completely stand-alone; it reads the input data directly from a CMOS image sensor and provides the results via a Field-Programmable Gate Array (FPGA) coupled to an embedded processor.

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