A Power-Aware Multi-Level Cache Organization Effective for Multi-Core Embedded Systems

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Provided by: Academy Publisher
Topic: Hardware
Format: PDF
Recent system design trends suggest multicore architecture for all computing platforms including distributed and embedded systems running real-time applications. Multilevel caches in a multicore system pose serious challenges as cache requires huge amount of energy to be operated and cache increases unpredictability due to its dynamic behavior. Bandwidth and synchronization problems are also critical design factors for distributed and embedded systems. In this paper, the authors propose a \"Miss table\" based cache memory organization which is very effective for real-time distributed and embedded systems.
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