A Real-Time Multi-Channel Memory Controller and Optimal Mapping of Memory Clients to Memory Channels

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Provided by: Association for Computing Machinery
Topic: Hardware
Format: PDF
Ever increasing demands for main memory bandwidth and memory speed/power trade-off led to the introduction of memories with multiple memory channels, such as wide IO DRAM (Dynamic Random-Access Memory). Efficient utilization of a multi-channel memory as a shared resource in multi-processor real-time systems depends on mapping of the memory clients to the memory channels according to their requirements on latency, bandwidth, communication and memory capacity. However, there is currently no real-time memory controller for multi-channel memories, and there is no methodology to optimally configure multi-channel memories in real-time systems.
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