A Real-Time Virtual Re-Convergence Hardware Platform

Provided by: Journal of Semiconductor Technology and Science (JSTS)
Topic: Hardware
Format: PDF
In this paper, the authors propose a real-time virtual re-convergence hardware platform especially to reduce the visual fatigue caused by stereoscopy. Their unique idea to reduce visual fatigue is to utilize the virtual re-convergence based on the optimized disparity-map that contains more depth information in the negative disparity area than in the positive area. Our virtual re-convergence hardware platform, which consists of image rectification, disparity estimation, depth post-processing and virtual view control, is realized in real-time with 60 FPS on a single Xilinx Virtex-5 FPGA chip.

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