A Result Forwarding Mechanism for Asynchronous Pipelined Systems

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Provided by: The University of Maine at Machias
Topic: Hardware
Format: PDF
Modern, fast microprocessors are deeply pipelined to enhance their performance. Thus they cannot afford to wait for each instruction to complete before starting the next. When inter-instruction dependencies are encountered it is essential that data are forwarded from their point of production to where they are needed as rapidly as possible. This has been a problem in asynchronous processors because of the lack of synchronization between the units producing and consuming the data. This paper presents a solution to this problem.
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