A Retargetable Parallel Programming Framework for MPSoC

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Provided by: Seoul metropolitan government
Topic: Hardware
Format: PDF
As more processing elements are integrated in a single chip, embedded software design becomes more challenging: It becomes a parallel programming for non-trivial heterogeneous multi-processors with diverse communication architectures and design constraints such as hardware cost, power, and timeliness. In the current practice of parallel programming with MPI or OpenMP, the programmer should manually optimize the parallel code for each target architecture and design constraints. Thus design space exploration of MPSoC (Multi-Processor System-on-Chip) costs prohibitively large as software development overhead increases drastically.
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