A SAR ADC with Reduced Number of Comparison Cycles

Provided by: Serials Publications
Topic: Hardware
Format: PDF
Successive AppRoximation (SAR) technique is often used in high resolution Analog-to-Digital Converters (ADCs) because it uses a single comparator and consumes less power. Unfortunately SAR technique requires N comparisons to convert N bit digital code from an analog sample. This makes SAR ADCs unsuitable for high speed applications. In this paper a method for SAR ADCs is described that requires as few as (N-4)/2 comparisons for N-bit resolution. Using this technique conversion speed is increased by 75% for 8 bit resolution. Therefore, this paper is best suitable when high-speed combined with high resolution is required.

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