Binary Information Press
A clock-accurate simulation platform is proposed for performance evaluation of reconfigurable processor with the characteristics of flexible interconnection, expandability and dense computational. The simulation platform is setup based on three functional level software architecture, which contains several functional modules such as flexible interconnection module, ISS, test module, etc. With these highly decoupled system functional modules, the simulation platform can quickly form reconfigurable processor evaluation model. The communication port and channel mechanism can support efficiently performance simulation for reconfigurable processor as well as debug and tracing mechanism.