A Standard Cell Based Synchronous Dual-Bit Adder with Embedded Carry Look-Ahead

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Provided by: WSEAS
Topic: Hardware
Format: PDF
A novel synchronous dual-bit adder design, realized using the elements of commercial standard cell libraries is presented in this paper. The adder embeds two-bit carry look-ahead generator functionality and is realized using simple and compound gates of the standard cell library. The performance of the proposed dual bit adder design is evaluated and compared vis-a-vis the conventional full adder (implemented using two half adder blocks) and the library's full adder element, when performing 32-bit addition on the basis of the fundamental carry propagate adder topology.
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