A Study on Adaptive Thresholds for Reduced Complexity Bit-Flip Decoding

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Provided by: Institute of Electrical and Electronics Engineers
Topic: Hardware
Format: PDF
Low-Density Parity-Check (LDPC) codes are capacity approaching codes that have rapidly been adopted in modern systems such as the IEEE 802.11n and Long Term Evolution Advanced (LTE-A) communications standards. The decoders based on the iterative belief propagation offer exceedingly high performance but unfortunately have high computational complexity. Therefore, significant research has focused on lower complexity architectures based on the family of so-called bit-flipping algorithms. In the basic bit-flipping algorithm, the number of failed parity checks for each bit is calculated and the sign of the bit with the maximum failed checks is inverted.
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