A Survey of Non-Conventional Techniques for Low-Voltage Low-Power Analog Circuit Design
Designing integrated circuits able to work under Low-Voltage (LV) Low-Power (LP) condition is currently undergoing a very considerable boom. Reducing voltage supply and power consumption of integrated circuits is crucial factor since in general it ensures the device reliability, prevents overheating of the circuits and in particular prolongs the operation period for battery powered devices. Recently, non-conventional techniques i.e. Bulk-Driven (BD), Floating-Gate (FG) and Quasi-Floating Gate (QFG) techniques have been proposed as powerful ways to reduce the design complexity and push the voltage supply towards threshold voltage of the MOS Transistors (MOSTs).