A Unified Methodology for Power Supply Noise Reduction in Modern Microarchitecture Design

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Provided by: Georgia Institute of Technology
Topic: Hardware
Format: PDF
In this paper, the authors present a novel design methodology to combat the ever-aggravating high frequency power supply noise (di/dt) in modern microprocessors. Their methodology integrates micro-architectural profiling for noise-aware floor-planning, dynamic runtime noise control to prevent unsustainable noise emergencies, as well as decap allocation; all to produce a design for the average-case current consumption scenario. The dynamic controller contributes a micro-architectural technique to eliminate occurences of the worst-case noise scenario thus their method focuses on average-case noise behavior.
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